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VLSI and Computer Architecture
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Editors: Kenzo Watanabe
Book Description:
Very-large-scale integration (VLSI) is the process of creating integrated circuits by combining thousands of transistor-based circuits into a single chip. The first semiconductor chips held one transistor each. Subsequent advances added more and more transistors, and as a consequence more individual functions or systems were integrated over time. The first integrated circuits held only a few devices, perhaps as many as ten diodes, transistors, resistors and capacitors, making it possible to fabricate one or more logic gates on a single device. Now known retrospectively as "small-scale integration" (SSI), improvements in technique led to devices with hundreds of logic gates, known as large-scale integration (LSI), i.e. systems with at least a thousand logic gates. Current technology has moved far past this mark and today's microprocessors have many millions of gates and hundreds of millions of individual transistors.

As of early 2008, billion-transistor processors are commercially available, an example of which is Intel's Montecito Itanium chip. This is expected to become more commonplace as semiconductor fabrication moves from the current generation of 65 nm processes to the next 45 nm generations. Another notable example is Nvidia's 280 series GPU. This microprocessor is unique in the fact that its 1.4 Billion transistor count, capable of a teraflop of performance, is almost entirely dedicated to logic (Itanium's transistor count is largely due to the 24MB L3 cache).

At one time, there was an effort to name and calibrate various levels of large-scale integration above VLSI. Terms like Ultra-large-scale Integration (ULSI) were used. But the huge number of gates and transistors available on common devices has rendered such fine distinctions moot. Terms suggesting greater than VLSI levels of integration are no longer in widespread use. Even VLSI is now somewhat quaint, given the common assumption that all microprocessors are VLSI or better.

This new book focuses on VLSI and computer architectures.

Table of Contents:

Chapter 1. Design Considerations and Algorithms for Broadband Fixed WiMAX Systems; pp.1-40
(Pei Xiao, Queens University, United Kingdom, Ioannis Chatzigeorgiou, University of Cambridge, United Kingdom, Miguel R. D. Rodrigues, University of Porto,Portugal, et al.)

Chapter 2. VLSI Interconnections and Their Delay Performance; pp. 41-85
(Brajesh Kumar Kaushik,G.B Pant Engineering College,India, R.P. Agarwal, R. C. Joshi, India Institute of Technology,Roorkee,India, Sankar Sarkar,Mody Institute of Technology and Science,Sikar,India)

Chapter 3. Development, Validation and Evaluation of a Space Qualified long Life Flight Computer Server; pp. 87-113
(Esau Vicente-Vivas,Universidad Nacional Autonoma de Mexico, Francisco J. Mendieta Jimenez,Centro de Investigacion de Education Superior de Ensenada,Mexico)

Chapter 4. Numerical Simulation of Quantum WaveGuides; pp. 115-137
(Anton Arnold, Matthias Ehrhardt and Maike Schulte, Institut f"ur Analysis und Scientific Computing, TU Wien, Wien, Austria, Institut f"ur Angewandte Analysis und Stochastik, Weierstrass Institute for Applied Analysis and Stochastics, Berlin, Germany 2 Institut f"ur Mathematik, TU Berlin, Berlin, Germany 3 Institut f"ur Numerische und Angewandte Mathematik, Universit M"unster, M"unster, Germany}

Chapter 5. Reference Architecture Model and Tools for Multi-modal Perceptual Systems; pp. 139-155
(Jan Kleindienst, Jan Curin, IBM Research, Prague,Czech Republic)

Chapter 6. *MOSFET's Programmable Conductance: The Way of VLSI Implementation for Emerging Applications from Biologically Plausible Neuromorphic Devices to Mobile Communications; pp. 157-176
(I.S. Han, Institute for Information Technology Covergence Korea Advanced Institute of Science and Technology, Daejeon, Korea)

Chapter 7. *Vision-Based Path Planning with Onboard VLSI Array Processors; pp. 177-194
(N. Sudha, A.R. Mohan, Centre for High Performance Embedded Systems, Nanyang Technological University, Singapore)

Chapter 8. *VLSI Architectures for Autonomous Robots A Review; pp. 195-210
(K. Sridharan, School of Computer Engineering, Singapore, Department of Electrical Engineering, India, Lam Siew Kei, T. Srikanthanc, School of Computer Engineering, Nanyang Technological University, Singapore)

Chapter 9. *Design of an Enhanced MAC Architecture for Multi-Hop Wireless Networks; pp. 211-227
(Ralph Bernasconi, DTI, Univ. of Applied Science (SUPSI) Via Cantonale, Silvia Giordano, Allessandro Puiatti, Manno, Switzerland, Raffaele Bruno, Marco Conti, and Enrico Gregori, IIT Institute, National Research Council (CNR), Pisa, Italy)


   Binding: Hardcover
   Pub. Date: 2009
   Pages: 239 pp.
   ISBN: 978-1-60692-075-6
   Status: AV
Status Code Description
AN Announcing
FM Formatting
PP Page Proofs
FP Final Production
EP Editorial Production
PR At Prepress
AP At Press
AV Available
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