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Embedded Cryptographic Hardware: Methodologies & Architectures
Retail Price: $195.00
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Editors: Nedjah, Nadia and Mourelle, Luiza de Macedo (State Univ. of Rio de Janeiro)
Book Description:
Modern cryptology, which is the basis of information security techniques, started in the late 70’s and developed in the 80’s. As communication networks were spreading deep into society, the need for secure communication greatly promoted cryptographic research. The need for fast but secure cryptographic systems is growing bigger. Therefore, dedicated systems for cryptography are becoming a key issue for designers. With the spread of reconfigurable hardware such as FPGAs, hardware implementations of cryptographic algorithms become cost-effective.
The focus of this book is on all aspects of embedded cryptographic hardware. Of special interest are contributions that describe new secure and fast hardware implementations and new efficient algorithms, methodologies and protocols for secure communications.
This book is organized in two parts. The first part is dedicated to embedded hardware of cryptosystems while the second part focuses on new algorithms for cryptography, design methodologies and secure protocols

Table of Contents:
Preface; Unified Hardware Architecture for the Secure Hash Standard (Akashi Staoh, IBM Research, Tokyo Research Lab.); A Hardware Accelerator for Elliptic Curve Cryptography over GF(2m) (Joseph Riley and Michael J. Schulte, Univ. of Wisconsin - Madison); Two New Algorithms For Modular Multiplication (Viktor Bunimov and Manfred Schimmler, Technical Univ. of Braunschweig); AES Packet Encryption on a SIMD Stream Processor (Yu-Kuen Lai and Gregory T. Byrd, North Carolina State Univ.); High-Speed Cryptography (Bertil Schmidt, Nanyang Technological Univ.,Manfred Schimmler, Technische Univ. Braunschweig and Heiko Schroder, RMIT University); A Design Framework for Scalable and Unified Multipliers in GF(P) and GF(2M) (Alexandre F. Tenca, Oregon State Univ., Erkay Sava, Sabanci Univ. Istanbul and Çetin K. Koç, Oregon State Univ); Three Hardware Implementations for the Binary Modular Exponentiation (Nadia Nedjah and Luiza de Macedo Mourelle, State Univ. of Rio de Janeiro); An on Chip CAST-128 Based Block Cipher with Dynamically Reconfigurable Sboxes Generated in Parallel (Panayiotis E. Nastou, Communication Group Paleo Faliro, Greece and Yiannis C. Stamatiou, Univ. of the Aegean); An FPGA-Based Design Flow of Five Cryptographic Algorithms (Juan M. Diaz, Slobodan Bojaniċ, Carlos Carreras, Octavio Nieto-Taladriz, Technical Univ. of Madrid); A Carry-Free Montgomery Inversion Algorithm (Erkay Savaş, Sabanci Univ.); Fully Distributed and Robust Threshold RSA Function Sharing Efficient for Small Number of Players (Maged H. Ibrahim, I. A. Ali, I.I.Ibrahim and A. H. El-Sawi, Helwin Univ.); Masked Inversion in GF(2n) Using Mixed Field Representations and its Efficient Implementation for AES (Shay Gueron, Ori Parzanchevsky and Or Zur, Univ. of Haifa); Embedded Cryptography Using One Instruction Computing (Phillip A. Laplante, Colin J. Neill and William Gilreath, Pennsylvania State Univ.); Unified Point Addition Formulæ for Elliptic Curve Cryptosystems (Eric Brier, Marc Joye, Card Security Group, La Ciotat Cedex, France and Isabelle Dechene, McGill Univ.); Accelerating Public-Key Cryptography Using the Co-Design Methodology (Nadia Nedjah and Luiza de Macedo Mourelle, State Univ. of Rio de Janeiro); On Specialized Hardware for Supporting the Number Field Sieve (Willi Geiselmann and Rainer Steinwandt, Univ. Karlsruhe (TH)); Index.

   Binding: Hardcover
   Pub. Date: 2004
   ISBN: 978-1-59454-012-7
  
  
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Embedded Cryptographic Hardware: Methodologies & Architectures