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Embedded Cryptographic Hardware: Design and Security
Retail Price: $260.00
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$234.00
Editors: Nedjah, Nadia and Mourelle, Luiza de Macedo (State Univ. of Rio de Janeiro)
Book Description:
Data security is an important requirement for almost all, if not all, information-oriented applications such as e-commerce, digital signature, secure Internet, etc. All these services use encrypted data. Cryptography is a milliner science that was the key to the secret of ancient Rome and a fundamental piece in the Second World War. Today, it is a star in the computation world. Several operating systems, data base systems or simple filling systems provide the user with cryptographic functions that allow controlled data scrambling.
Modern cryptology, which is the basis of information security techniques, started in the late 1970's and developed in the 1980's. As communication networks were spreading deep into society, the need for secure communication greatly promoted cryptographic research. The need for fast but secure cryptographic systems is growing bigger. Therefore, dedicated hardware for cryptography is becoming a key issue for designers. With the spread of reconfigurable hardware such as FPGAs, hardware implementations of cryptographic algorithms became cost-effective. The focus of this book is on all aspects of cryptographic hardware and embedded systems. This includes design, implementation and security of such systems. The content of this book is divided into four main parts, each of which is organized in three chapters, with the exception of the last one.

Table of Contents:
Chapter Availability

Individual chapters are available for $25 each by sending an email to novascience@earthlink.net. Nova will provide the chapter for your easy downloading or send it as an email attachment if you prefer.

Preface; PART 1. CRYPTOGRAPHIC HARDWARE DESIGN. Chapter 1. Compact and Efficient Encryption/Decryption Module for FPGA Implementation of AES (Gašl Rouvroy, Francois-Xavier Standaert, Jean-Jacques Quisquater and Jean-Didier Legat, Universite catholique de Louvain, Belgium); Chapter 2. PAX: A Datapath-Scalable Minimalist Cryptographic Processor For Mobile Devices (Ahmet Murat Fiskiran and Ruby B. Lee Princeton University);, Chapter 3. Architectural Design Features of a Programmable High Throughput AES Coprocessor (Alireza Hodjat, Patrick Schaumont and Ingrid Verbauwhede, Electrical Engineering Department, University of California, Los Angeles); PART 2. CRYPTOGRAPHIC HARDWARE SECURITY. Chapter 4. Power-Analysis Attack on an ASIC AES Implementation (Siddika Berna Ors, Katholieke Universiteit Leuven, Belgium; Frank K. Gurkaynak, Integrated Systems Laboratory ETH Zentrum, Switzerland; Elisabeth Oswald, Institute for Applied Information Processing and Communications (IAIK),Austria; Bart Preneel, Katholieke Universiteit Leuven, Belgium); Chapter 5. On the Importance of Protecting c in SFLASH against Side Channel Attacks (Katsuyuki Okeya, Hitachi, Ltd., Japan; Tsuyoshi Takagi and Camille Vuillaume,Fachbereich Informatik, Germany); Chapter 6. Resistance Against Power and Timing Attacks: An Evaluation of Two Clock-less Implementations of the AES (An Yu and David S. Bree, University of Manchester); PART 3. HARDWARE FOR MODULAR MULTIPLICATION. Chapter 7. Modular Multiplication: Methods and Hardware (Nadia Nedjah and Luiza de Macedo Mourelle); Chapter 8. A Design of Basis-Independent Bit-Parallel Multipliers (Michele Elia, Politecnico di Torino, Italy; Manuel Leone, Telecom Italia Lab, Italy); Chapter 9. Reducing the Complexity of Modular Multiplication by Modification of One Operand (Manfred Schimmler and Viktor Bunimov, Christian-Albrechts-University of Kiel, Germany); PART 4. ELLIPTIC CURVE CRYPTOGRAPHIC HARDWARE. Chapter 10. Special Hyperelliptic Curve Cryptosystems of Genus Two: Efficient Arithmetic and Fast Implementation (Jan Pelzl, Thomas Wollinger and Christof Paar, Ruhr University of Bochum, Germany); Chapter 11. A Generic Coprocessor For Elliptic Curve Scalar Multiplication on Hardware (Nazar A. Saqib, Francisco Rodriguez-Henriquez and Arturo Diaz-Perez, Instituto Politecnico Nacional No. 2508, Mexico); Chapter 12. Hyperelliptic Curve Cryptosystem: What is the Best Parallel Hardware Architecture? (Guido Bertoni, STMicroelectronics, Advanced System Technology Agrate Brianza, Italy; Luca Breveglieri, Politecnico di Milano, Italy; Thomas Wollinger and Christof Paar, Ruhr University of Bochum, Germany); PART 5. NEW ENCRYPTION METHODS. Chapter 13. Permutation Operations in Block Ciphers (R. B. Lee, Princeton University; R. L. Rivest, M.I.T., Computer Science and Artificial Intelligence Laboratory; M. J. B. Robshaw, University of London, Egham; Z. J. Shi and Y. L. Yin, Princeton University); Chapter 14. Streaming Encryption for a Secure Wavelength and Time Domain Hopped Optical Network (Herwin Chan, Alireza Hodjat, Jun Shi, Richard Wesel and Ingrid Verbauwhede, University of California, Los Angeles); Bibliography; Index.

   Binding: Hardcover
   Pub. Date: 2005
   ISBN: 978-1-59454-145-2
   Status: AV
  
Status Code Description
AN Announcing
FM Formatting
PP Page Proofs
FP Final Production
EP Editorial Production
PR At Prepress
AP At Press
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Embedded Cryptographic Hardware: Design and Security